As known in the art, “die bonding” or “die attach” describes the operation of attaching semiconductor die either to a package substrate or to some other substrate such as tape carrier for tape automated bonding. The die is first picked from a separated wafer or waffle tray, aligned to a target pad on the carrier or substrate, and then permanently attached, usually by a solder or epoxy bond.
Die attach temperatures during assembly of IC die is generally performed at a temperature of least 150° C., and can be performed at temperatures of 375° C. or more for eutectic die attach. Assembly of very thin die (<100 μm thick, e.g., 20 to 80 μm) to some package substrates, such as organic substrates, is known to be difficult due to the warpage of the die caused by the large coefficient of thermal expansion (CTE) mismatch between the die and the package substrate. For example, in the case of a silicon die, the CTE of the die may be about 3 ppm/° C., and the CTE of the organic substrate may be about 20 ppm/° C. or higher. This problem can be further aggravated by thin package substrates (e.g., about 100-200 μm thick) that may lack of rigidity over temperature.
Even minimal die warpage can cause alignment and resulting die attach problems in the case of small area and/or dense die contacts. Misaligned joints reduces contact area that increases contact resistance of the joints, and can even cause open circuited contacts. For example, contacts associated with through substrate vias (TSVs; referred to herein as through silicon vias in the particular case of a silicon substrate) can be very small in area. Similarly, if other contact structures such as pillars (e.g., copper pillars) or studs (e.g., gold studs) become small enough and/or dense enough, warpage can become a significant problem. Warpage is also especially problematic for die stacks when one of the die has contacts on both sides, for example, involving flip chip package substrate connections on one side of the die and small area TSV connections on the other side of the die.
One known method for addressing the above described warpage problem is using low CTE package substrates that provide improved CTE matching relative to the die. For example, ceramic substrates and some specialized polymer substrates may provide improved CTE matching with the die. However, low CTE package substrates are generally significantly more expensive as compared to conventional epoxy-glass resin-based (e.g., BT resin) organic substrates. What is needed is new packaging methodology for minimizing warpage and resulting effects of the CTE mismatch between the die and package substrate during assembly to allow use of conventional polymer substrates.